All known bugs have been worked out and the current PC board is at revision C.
PacComm has been licensed
to manufacture the modem and expects to sell it for $349.
PacComm now has modems in production! They are curently filling back orders.
Allows the modem to become a full duplex bit repeater with no additional hardware. A DIP switch will enable this feature. The FIFO will allow plus or minus 4 bits of clock slip during a frame. The FIFO resets at the start of carrier detect. This should allow up to aproximately 4K bytes to be repeated per transmission with a 0.01 percent clock difference between sender and receiver. The RS422 interface will remain fully functional when the bit repeater is enabled.
10 front panel LEDs will indicate signal level.
A DIP switch can select "tune up mode" . When in this mode the transmitter will become a sweep generator to allow tuning the RF coils properly using only a dual trace 30 mhz scope.
All the digital logic is implimented in a single Xilinx XC3042A-7 chip. This chip is packaged in an 84 pin PLCC and has 144 CLBs (configurable logic blocks) of which 131 are used so far. A 27C256 eprom holds both the Xilinx chip programing data and all the state machine and waveform tables for the modem transmitter. It also holds the data which is loaded into the frequency synthesizer at power up. The remote control code is in the eprom as well. The user can change the IF frequency independently for the receiver and transmitter by using a computer program to modify the eprom binary image. While this is not as convienent as rotary switches it reduced the size of the pc board and reduced costs. The same program also sets the remote control codes. Up to 8 frequencies can be stored in a single EPROM. 3 dip switches select the desired frequency. Transmit and receive frequencies are programmed independently.
User transmit data pass through a 26LS32 RS-422 receiver chip and on to the Xilinx chip. The data is scrambled (x17 + x5 +1) and converted to NRZI before being modulated onto a 448 khz carrier using MSK. The transmitter RF waveforms are read out of the EPROM so no external balanced modulators are required. The 448 KHZ digital transmit signal is converted to analog voltage with an 8 bit DAC implimented with only 2 resistor packs. A 3 section LC bandpass filter removes sampling noise and unwanted sidebands. The 448 khz signal is converted up to 10.63 MHZ and then to 29 mhz using NE602 chips. The only adjustments involve tuning the filters. The special tuning mode should make that task simple. The synthesizer and all local oscillators run continously. This makes the transmiter respond instantly to RTS. The key up delay should be close to zero. The transmitter signal is compatable with current 56KB WA4DSY modems.
The receiver uses a Motorola MC13135 chip. The 29 mhz IF is converted to 10.63 mhz then to 448 khz. A 3 section LC band pass filter tuned to 448 khz provides selectivity. A quadrature detector in the chip demodulates the data. The raw data is passed through a tracking data detector much like that used in the original modem design. The sliced data goes into the Xilinx chip where clock is recovered digitally. The data is converted from NRZI to NRZ format and descrambled. Clock and Data are supplied to the user thorough a 26LS31 RS-422 driver chip.
Data carrier detection is also done digitally in the Xilinx chip.
Dale Heatherington WA4DSY